F71869
Super I/O + Hardware Monitor
Release Date: Jul, 2009
Version: V1.1
Fintek
Feature Integration Technology Inc.
F71869
F71869 Datasheet Revision History
Version
V1.0
V1.1
Date
Jun, 2009
Jul, 2009
Page
Official released
16
Revise ST2 pin description
Revision History
Please note that all data and specifications are subject to change without notice. All the trade marks of products and
companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Customers using or selling these products for use in
such applications do so at their own risk and agree to fully indemnify Fintek for any damages resulting from such
improper use or sales.
1
2009
V1.1
Fintek
Feature Integration Technology Inc.
F71869
Table of Contents
1. GENERAL DESCRIPTION............................................................................................................................................ 4
2. FEATURE ...................................................................................................................................................................... 4
3. PIN CONFIGURATION.................................................................................................................................................. 7
4. PIN DESCRIPTION ....................................................................................................................................................... 8
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
P
OWER
P
INS
.............................................................................................................................................................8
LPC I
NTERFACE
........................................................................................................................................................9
FDC .........................................................................................................................................................................9
UART
AND
SIR .......................................................................................................................................................10
P
ARALLEL
P
ORT
......................................................................................................................................................12
H
ARDWARE
M
ONITOR
..............................................................................................................................................13
ACPI F
UNCTION
P
INS
..............................................................................................................................................14
B
IT
S
ELECT AND
O
THERS
.........................................................................................................................................16
KBC F
UNCTION
.......................................................................................................................................................17
5. FUNCTIONAL DESCRIPTION ......................................................................................................................................18
5.1
5.2
5.3
5.4
5.5
5.6
P
OWER
T
RAP
O
PERATION
........................................................................................................................................18
H
ARDWARE
M
ONITOR
..............................................................................................................................................18
ACPI F
UNCTION
......................................................................................................................................................28
T
IMING
C
ONTROL
S
EQUENCE
...................................................................................................................................29
ST1, ST2
AND
ATX_PWRGDSW T
IMING
................................................................................................................30
AMD TSI
AND
I
NTEL
PECI F
UNCTION
.......................................................................................................................32
5. REGISTER DESCRIPTION.........................................................................................................................................34
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
G
LOBAL
C
ONTROL
R
EGISTERS
.................................................................................................................................38
FDC R
EGISTERS
(CR00) ........................................................................................................................................45
UART1 R
EGISTERS
(CR01) ....................................................................................................................................47
UART2 R
EGISTERS
(CR02) ....................................................................................................................................48
P
ARALLEL
P
ORT
R
EGISTER
(CR03)..........................................................................................................................50
H
ARDWARE
M
ONITOR
R
EGISTERS
(CR04)................................................................................................................51
KBC R
EGISTERS
(CR05) ........................................................................................................................................84
GPIO R
EGISTERS
(CR06).......................................................................................................................................85
BIT SELECT R
EGISTERS
(CR07) ...........................................................................................................................99
PME
AND
ACPI R
EGISTERS
(CR0A) ..................................................................................................................101
2
2009
V1.1
Fintek
Feature Integration Technology Inc.
F71869
7. ELECTRICAL CHARACTERISTIC .............................................................................................................................107
8. ORDERING INFORMATION........................................................................................................................................108
9. PACKAGE DIMENSIONS (128-PQFP) .......................................................................................................................108
10. APPLICATION CIRCUIT............................................................................................................................................ 110
3
2009
V1.1
Fintek
Feature Integration Technology Inc.
F71869
1. General Description
The F71869 which is the featured IO chip for PC system is equipped with one IEEE 1284 Parallel Port,
two UART Ports, Hardware Keyboard Controller, SIR and one FDC. The F71869 integrates with
hardware monitor, 9 sets of voltage sensor, 3 sets of creative auto-controlling fans and 3 temperature
sensor pins for the accurate dual current type temperature measurement for CPU thermal diode or
external transistors 2N3906. Others, the F71869 supports newest AMD TSI and Intel PECI interfaces and
INTEL Ibex PEAK SMBus for temperature sensing and provides the power sequence controller function
for AMD platform
The F71869 provides flexible features for multi-directional application. For instance, supports 3-in/out
pins North Bridge Bit select controlling with offset implement., provides 45 GPIO pins (multi-pin), IRQ
sharing function also designed in UART feature for particular usage and accurate current mode H/W
monitor will be worth in measurement of temperature, provides 3 modes fan speed control mechanism
included Manual Mode/Stage Auto Mode/Linear Auto Mode for users’ selection.
These features as above description will help you more and improve product value. Finally, the
F71869 is powered by 3.3V voltage, with the LPC interface in the green package of 128-PQFP.
2. Feature
General Functions
Comply with LPC Spec. 1.0
Support DPM (Device Power Management), ACPI
Support AMD power sequence controller
3 In/Out Bit Select
Provides one FDC, two UARTs, Hardware KBC and Parallel Port
H/W monitor functions
Support AMD TSI Interface, Intel PECI interface, Intel Block Read/Write SMBus Interface
45 GPIO Pins for flexible application
24/48 MHz clock input
Packaged in 128-PQFP and powered by 3.3VCC
FDC
Compatible with IBM PC AT disk drive systems
4
2009
V1.1
